Interactive visualisations
Self-contained pages for the CEG5203 / CG3207 computer architecture lectures. Open an .html file in a browser. No server or install is needed. The first four pages load their _engine.js, so keep each page and its engine in the same folder; the interrupt simulator is a single file.
| Page | Shows | Guide | Spec |
|---|---|---|---|
| opencl.html | One OpenCL host program step by step: device discovery, buffer transfers, kernel launch, work-groups on compute units, read-back. | opencl.md | opencl_specs.md |
| dataparallel.html | One loop on scalar, SIMD and SIMT hardware, plus warp divergence, latency hiding and memory coalescing. | dataparallel.md | dataparallel_specs.md |
| systolic.html | Matrix multiply on a systolic array, output stationary and weight stationary (the TPU). | systolic.md | systolic_specs.md |
| multithread.html | Two threads on one superscalar core: no multithreading, coarse-grained, barrel, fine-grained and SMT. | multithread.md | multithread_specs.md |
| RISC-V Interrupt Simulator.html | Vectored against non-vectored interrupt handling. Click a peripheral to raise an IRQ, then step through the context switch, the ISR and the return. Vectored mode jumps through the vector table; non-vectored mode enters one handler that polls the interrupt status and branches. | – | – |
The guides say how to use each page. The specs describe the models behind them and keep each page's version history.
Other files
*_engine.js: the simulation behind each of the first four pages, with no DOM access. Loaded by the page and by its tests.*_tests/: engine and browser tests for each of the first four pages. From the repository root, runnode opencl/<page>_tests/engine.test.jsandNODE_PATH=$(npm root -g) node opencl/<page>_tests/ui.test.js.